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Design

Our Chip Design experts share insights to help you optimize your silicon designs for power, performance, area, and yield.

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Writers

Top Writers

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Multi-Die Design Challenges: Industry Leaders Provide Insights and Guidance

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4 min read/May 15, 2025

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Multi-Die Design Challenges: Industry Leaders Provide Insights and Guidance

By Frank Malloy

Tags: Multi-Die System, Chip Design Insights, Design, 3DIC Design

AI in Engineering: How Technology is Reshaping Engineering Roles and Skills

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4 min read/May 07, 2025

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AI in Engineering: How Technology is Reshaping Engineering Roles and Skills

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design

How AgentEngineer? Technology Will Transform Engineering Workflows

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3 min read/May 06, 2025

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How AgentEngineer? Technology Will Transform Engineering Workflows

By Sassine Ghazi

Tags: AI & Machine Learning, Chip Design Insights, Design

Using AI to Accelerate Chip Design: Dynamic, Adaptive Flows

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3 min read/Apr 15, 2025

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Using AI to Accelerate Chip Design: Dynamic, Adaptive Flows

By Rob van Blommestein, James Chuang

Tags: AI & Machine Learning, Product Spotlight, Fusion Technology, Chip Design Insights, Design, Fusion Design Platform

5 Automotive Functional Safety Insights for Modern Vehicles

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5 min read/Apr 10, 2025

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5 Automotive Functional Safety Insights for Modern Vehicles

By Jyotika Athavale

Tags: Silicon Lifecycle Management, Chip Design Insights, Design, Foundation IP, Automotive, Silicon IP

What��s Your Vector? Synopsys Introduces New ARC VPX6 Digital Signal Processor IP

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6 min read/Apr 08, 2025

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What��s Your Vector? Synopsys Introduces New ARC VPX6 Digital Signal Processor IP

By Markus Willems

Tags: AI & Machine Learning, Product Spotlight, Chip Design Insights, Design, Automotive, Processor ��ý, Silicon IP

From Bits to Qubits: How Synopsys is Helping Advance Quantum Computing R&D

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2 min read/Apr 03, 2025

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From Bits to Qubits: How Synopsys is Helping Advance Quantum Computing R&D

By Synopsys Editorial Staff

Tags: Chip Design Insights, Quantum Computing, Design, Manufacturing, Atomic Scale Modeling

Inflection Point: Synopsys and Arm CEOs Discuss the Opportunity �� and Unprecedented Complexity �� of AI

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5 min read/Apr 02, 2025

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Inflection Point: Synopsys and Arm CEOs Discuss the Opportunity �� and Unprecedented Complexity �� of AI

By Greg Sorber

Tags: AI & Machine Learning, Chip Design Insights, Design, Inside Synopsys

Re-engineering Engineering? from Silicon to Systems

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3 min read/Mar 19, 2025

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Re-engineering Engineering? from Silicon to Systems

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design, HPC, Data Center

Transforming Edge Software Development with Arm-based Virtual Prototyping

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3 min read/Mar 09, 2025

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Transforming Edge Software Development with Arm-based Virtual Prototyping

By Malte Doerper

Tags: Cloud, Product Spotlight, Prototyping, Chip Design Insights, Design, Verification, Virtual Prototyping

Synopsys HAPS-200 and ZeBu-200 Expand the Industry��s Highest Performance Hardware-Assisted Verification Portfolio

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5 min read/Feb 13, 2025

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Synopsys HAPS-200 and ZeBu-200 Expand the Industry��s Highest Performance Hardware-Assisted Verification Portfolio

By Frank Schirrmeister

Tags: Chip Design Insights, Simulation, Design, Emulation, Verification, Virtual Prototyping

Solving Systems Problems with DIY Silicon: How an ASU Researcher Became an Unwitting Chip Designer

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4 min read/Feb 13, 2025

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Solving Systems Problems with DIY Silicon: How an ASU Researcher Became an Unwitting Chip Designer

By Greg Sorber

Tags: Customer Spotlight, Prototyping, Chip Design Insights, Design, Emulation, Verification, Virtual Prototyping, Customer

Synopsys Aims to Reduce Silicon Design Cycles by up to a Year in Collaboration with Arm

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2 min read/Feb 06, 2025

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Synopsys Aims to Reduce Silicon Design Cycles by up to a Year in Collaboration with Arm

By Arun Bhattacharya

Tags: Multi-Die System, Chip Design Insights, Design, Interface IP, Foundation IP, Silicon IP

Synopsys Bold Prediction: 50% of New HPC Chip Designs Will Be Multi-Die in 2025

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2 min read/Jan 21, 2025

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Synopsys Bold Prediction: 50% of New HPC Chip Designs Will Be Multi-Die in 2025

By Shekhar Kapoor, Michael Posner

Tags: Multi-Die System, Chip Design Insights, Design, 3DIC Compiler

Collaboration for Innovation: How Synopsys and TSMC are Advancing Chip Design

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2 min read/Dec 05, 2024

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Collaboration for Innovation: How Synopsys and TSMC are Advancing Chip Design

By Synopsys Editorial Staff

Tags: Multi-Die System, Chip Design Insights, Design, Manufacturing, Foundation IP, HPC, Data Center, Silicon IP, 3DIC Design

AI Startups are Using the Cloud to Accelerate Chip Design and Time-to-Market

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4 min read/Nov 18, 2024

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AI Startups are Using the Cloud to Accelerate Chip Design and Time-to-Market

By Greg Sorber

Tags: Customer Spotlight, Cloud, Chip Design Insights, Design

Combining Silicon Data Capture and Edge Processing Offers a Promising Solution for Automotive OEMs

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6 min read/Sep 03, 2024

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Combining Silicon Data Capture and Edge Processing Offers a Promising Solution for Automotive OEMs

By Lorin Kennedy

Tags: Silicon Lifecycle Management, Chip Design Insights, Design, Automotive

Accelerating the Pace and Precision of AI Chip Innovation: Synopsys Expanding ZeBu Cloud Capacity

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4 min read/Aug 26, 2024

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Accelerating the Pace and Precision of AI Chip Innovation: Synopsys Expanding ZeBu Cloud Capacity

By Stelios Diamantidis

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Silicon IP

How to Use Python to Customize PrimeTime

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4 min read/Jul 09, 2024

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How to Use Python to Customize PrimeTime

By Manoz Palaparthi

Tags: Chip Design Insights, Design, Signoff

The Dynamic Traceability Method: Revolutionizing Software Testing

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2 min read/Jun 26, 2024

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The Dynamic Traceability Method: Revolutionizing Software Testing

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Imec and Synopsys Lower the Barriers to 2nm Technology With New Pathfinding Design Kit

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3 min read/Jun 25, 2024

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Imec and Synopsys Lower the Barriers to 2nm Technology With New Pathfinding Design Kit

By Kritti Pathak, Alec Vogt

Tags: Chip Design Insights, Design, Inside Synopsys

How Chip Makers Are Defying Complexity and Innovating Faster

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3 min read/Jun 24, 2024

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How Chip Makers Are Defying Complexity and Innovating Faster

By Shankar Krishnamoorthy

Tags: AI & Machine Learning, Chip Design Insights, Design

GUC Leverages 3DIC Compiler to Enable 2.5D/3D Multi-Die Package

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5 min read/Jun 12, 2024

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GUC Leverages 3DIC Compiler to Enable 2.5D/3D Multi-Die Package

By Synopsys Editorial Staff, WeiHsun Liao

Tags: Customer Spotlight, Multi-Die System, Chip Design Insights, Design, 3DIC Design

Create Smarter, More Reliable Software-Defined Vehicles with Synopsys and AWS

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5 min read/Jun 06, 2024

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Create Smarter, More Reliable Software-Defined Vehicles with Synopsys and AWS

By Ajit Kolhe, Randy Fish, Mohan Yellapantula, Marc Serughetti, Stewart Williams

Tags: Chip Design Insights, Design, Automotive

Leveraging Generative AI for Chip Design: A New Era of Innovation Explored at Computex

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2 min read/May 30, 2024

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Leveraging Generative AI for Chip Design: A New Era of Innovation Explored at Computex

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design

CoreHW Develops 80GHz mmWave PLL with Synopsys RFIC Design Flow on GlobalFoundries 22FDX Technology

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3 min read/May 09, 2024

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CoreHW Develops 80GHz mmWave PLL with Synopsys RFIC Design Flow on GlobalFoundries 22FDX Technology

By Jian Yang, Sween Kang

Tags: Customer Spotlight, Custom Implementation, Chip Design Insights, Design

Why Analog Design Challenges Need Breakthrough Technologies

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5 min read/Apr 30, 2024

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Why Analog Design Challenges Need Breakthrough Technologies

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Analog Design, Inside Synopsys

What You Need to Know About Gate-All-Around Designs

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6 min read/Apr 22, 2024

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What You Need to Know About Gate-All-Around Designs

By Andrew Appleby

Tags: Chip Design Insights, Design, 5nm and Below, Silicon IP

Cisco Accelerates Project Schedule by 66% Using Synopsys Cloud

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2 min read/Apr 18, 2024

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Cisco Accelerates Project Schedule by 66% Using Synopsys Cloud

By Anuj Pant

Tags: Customer Spotlight, Cloud, Chip Design Insights, Design, Physical Implementation, Signoff

Leveraging Early Power Network Analysis to Accelerate Chip Design

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4 min read/Apr 16, 2024

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Leveraging Early Power Network Analysis to Accelerate Chip Design

By Rob van Blommestein

Tags: Chip Design Insights, Design, Physical Implementation

Powering Innovation in the Era of Pervasive Intelligence

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4 min read/Apr 03, 2024

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Powering Innovation in the Era of Pervasive Intelligence

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design, Manufacturing, Verification, Inside Synopsys

Why You Need to Consider Energy Efficiency of Your HPC SoC Early On

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4 min read/Apr 01, 2024

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Why You Need to Consider Energy Efficiency of Your HPC SoC Early On

By William Ruby

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, HPC, Data Center

TetraMem Delivers RISC-V AI Accelerator Tape-Out in Record Time on Synopsys Cloud

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3 min read/Mar 27, 2024

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TetraMem Delivers RISC-V AI Accelerator Tape-Out in Record Time on Synopsys Cloud

By Anuj Pant

Tags: Customer Spotlight, Cloud, Chip Design Insights, Design

Can GPUs Accelerate Digital Design Implementation?

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4 min read/Mar 26, 2024

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Can GPUs Accelerate Digital Design Implementation?

By James Chuang

Tags: Chip Design Insights, Design

A Fast and Seamless Way to Burst to the Cloud for Peak EDA Workloads

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3 min read/Mar 20, 2024

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A Fast and Seamless Way to Burst to the Cloud for Peak EDA Workloads

By Vikram Bhatia

Tags: Cloud, Product Spotlight, Chip Design Insights, Design, Verification

Synopsys and Arm Collaboration -Accelerating Development and Innovation for Arm-based Automotive Systems

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4 min read/Mar 15, 2024

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Synopsys and Arm Collaboration -Accelerating Development and Innovation for Arm-based Automotive Systems

By Marc Serughetti

Tags: Verification Central, Design, Automotive, Verification, Virtual Prototyping

Synopsys Collaborates with Arm to Drive Automotive Design Excellence

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4 min read/Mar 13, 2024

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Synopsys Collaborates with Arm to Drive Automotive Design Excellence

By Stewart Williams

Tags: Chip Design Insights, SoC Verification Automation, Design, Automotive, Silicon IP, Verification, Virtual Prototyping, Platform

CalligoTech Enables Next-Gen Computing at Scale with Synopsys Digital Design Flow

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3 min read/Mar 05, 2024

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CalligoTech Enables Next-Gen Computing at Scale with Synopsys Digital Design Flow

By Karan Shah, Irfan Shaikh

Tags: Customer Spotlight, RTL Synthesis, AI & Machine Learning, Physical Verification, Test, Chip Design Insights, Design, Physical Implementation, Signoff, HPC, Data Center

3 Key Trends for EDA in the Cloud in 2024

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5 min read/Feb 28, 2024

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3 Key Trends for EDA in the Cloud in 2024

By Vikram Bhatia

Tags: Cloud, Chip Design Insights, Design, Verification

How Power Device Workbench Ensures Maximum Efficiency

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5 min read/Feb 14, 2024

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How Power Device Workbench Ensures Maximum Efficiency

By Dermott Lynch

Tags: Product Spotlight, Chip Design Insights, Design

Why Is the Power Device Market So Hot Right Now?

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4 min read/Jan 24, 2024

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Why Is the Power Device Market So Hot Right Now?

By Dermott Lynch

Tags: Chip Design Insights, Design, Energy-Efficient SoCs

Avoiding Multi-Die System Re-spins with New Early Architecture Exploration Technology

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4 min read/Jan 23, 2024

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Avoiding Multi-Die System Re-spins with New Early Architecture Exploration Technology

By Kamal Desai

Tags: Multi-Die System, Chip Design Insights, Design, Platform

Can 3DHI Meet the Demands of Aerospace and Government Applications?

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5 min read/Jan 22, 2024

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Can 3DHI Meet the Demands of Aerospace and Government Applications?

By Kenneth Larsen, Ian Land, Rob Aitken

Tags: Multi-Die System, Aerospace & Government, Chip Design Insights, Design

Driving Higher Energy Efficiency in Automotive Electronics Designs

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4 min read/Jan 17, 2024

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Driving Higher Energy Efficiency in Automotive Electronics Designs

By William Ruby

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, Automotive

How AI Is Enabling Digital Design Retargeting to Maximize Productivity

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5 min read/Jan 03, 2024

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How AI Is Enabling Digital Design Retargeting to Maximize Productivity

By Rob van Blommestein

Tags: AI & Machine Learning, Product Spotlight, Chip Design Insights, Design

Meet Synopsys.ai Copilot, Industry's First GenAI Capability for Chip Design

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5 min read/Nov 27, 2023

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Meet Synopsys.ai Copilot, Industry's First GenAI Capability for Chip Design

By Geetha Rangarajan

Tags: AI & Machine Learning, Product Spotlight, Chip Design Insights, Design, Verification

How Photonics Can Light the Way for Higher Performing Multi-Die Systems

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5 min read/Nov 21, 2023

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How Photonics Can Light the Way for Higher Performing Multi-Die Systems

By Kenneth Larsen, Twan Korthorst

Tags: Multi-Die System, Chip Design Insights, Design, Photonic

Synopsys Commits to Advancing IC Design Talent and Chip Development in Vietnam

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4 min read/Nov 16, 2023

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Synopsys Commits to Advancing IC Design Talent and Chip Development in Vietnam

By Deirdre Hanford

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

How Will Angstrom-Scale Chips Advance the Electronics Industry?

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7 min read/Nov 15, 2023

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How Will Angstrom-Scale Chips Advance the Electronics Industry?

By Deepak Sherlekar, Rob Aitken

Tags: AI & Machine Learning, Chip Design Insights, Design, 5nm and Below, Automotive, HPC, Data Center

Synopsys Cloud: The Power of Automated License Management

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4 min read/Nov 14, 2023

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Synopsys Cloud: The Power of Automated License Management

By Varun Shah

Tags: Cloud, Product Spotlight, Chip Design Insights, Design, Verification

Showcasing AI-Driven Analog Design Migration at Samsung SAFE Forum

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6 min read/Nov 02, 2023

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Showcasing AI-Driven Analog Design Migration at Samsung SAFE Forum

By Neel Gopalan

Tags: Custom Implementation, Chip Design Insights, Design

Pioneering Seamless Interoperability on Cloud Across the Semiconductor Design Ecosystem

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3 min read/Oct 31, 2023

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Pioneering Seamless Interoperability on Cloud Across the Semiconductor Design Ecosystem

By Vikram Bhatia

Tags: Cloud, Chip Design Insights, Design, Verification

How OpenLight and Synopsys Are Reimagining Data Centers Through Silicon Photonics

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4 min read/Oct 26, 2023

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How OpenLight and Synopsys Are Reimagining Data Centers Through Silicon Photonics

By Jigesh K. Patel, Keivan Javadi Khasraghi

Tags: Data Center, Chip Design Insights, Design, Interface IP, Photonic, Silicon IP

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5 min read/Oct 12, 2023

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Accelerating Analog Design Migration

By Yuval Shay

Tags: Chip Design Insights, Design

Ensuring the Health and Reliability of Multi-Die Systems

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7 min read/Oct 11, 2023

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Ensuring the Health and Reliability of Multi-Die Systems

By Randy Fish, Yervant Zorian, Manuel Mota, Guy Cortez

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, HPC, Data Center

Exploring Advanced Power Optimization for a More Sustainable Future

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3 min read/Oct 06, 2023

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Exploring Advanced Power Optimization for a More Sustainable Future

By William Ruby

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, Verification

Samsung Foundry and Synopsys Accelerate Multi-Die System Design

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4 min read/Sep 21, 2023

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Samsung Foundry and Synopsys Accelerate Multi-Die System Design

By Henry Sheng, Jennifer Pyon

Tags: Multi-Die System, Product Spotlight, Chip Design Insights, Design

New Unified Electrostatic Reliability Analysis Solution Has Your Chip Covered

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3 min read/Sep 20, 2023

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New Unified Electrostatic Reliability Analysis Solution Has Your Chip Covered

By Dermott Lynch

Tags: Product Spotlight, Chip Design Insights, Design

Automatic Test Case Generation: When It Makes Sense

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1 min read/Sep 20, 2023

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Automatic Test Case Generation: When It Makes Sense

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Addressing Multi-Physics Effects for High-Performing Multi-Die Systems

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4 min read/Aug 22, 2023

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Addressing Multi-Physics Effects for High-Performing Multi-Die Systems

By Shekhar Kapoor, Kenneth Larsen

Tags: Multi-Die System, Chip Design Insights, Design

How to Augment SoC Development to Conquer Your Design Hurdles

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5 min read/Aug 16, 2023

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How to Augment SoC Development to Conquer Your Design Hurdles

By Rita Horner, Praveen Durga

Tags: Chip Design Insights, Design, HPC, Data Center

How to Save Power and Keep HPC and Data Center Applications Cool

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6 min read/Aug 15, 2023

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How to Save Power and Keep HPC and Data Center Applications Cool

By Shekhar Kapoor, Rita Horner, William Ruby

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, HPC, Data Center

What are AI Chips? A Comprehensive Guide to AI Chip Design

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6 min read/Aug 10, 2023

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What are AI Chips? A Comprehensive Guide to AI Chip Design

By Rob van Blommestein

Tags: AI & Machine Learning, Chip Design Insights, Design

Designing Energy-Efficient AI Accelerators for Data Centers and the Intelligent Edge

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4 min read/Jul 26, 2023

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Designing Energy-Efficient AI Accelerators for Data Centers and the Intelligent Edge

By William Ruby

Tags: AI & Machine Learning, Chip Design Insights, Design, Energy-Efficient SoCs, HPC, Data Center

A Trillion-Dollar Industry: How AI Is Reinventing EDA and Semiconductors

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6 min read/Jul 21, 2023

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A Trillion-Dollar Industry: How AI Is Reinventing EDA and Semiconductors

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design

Can Photonics Power Next-Gen AI Chatbots?

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5 min read/Jul 19, 2023

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Can Photonics Power Next-Gen AI Chatbots?

By Twan Korthorst

Tags: AI & Machine Learning, Chip Design Insights, Design, Photonic, HPC, Data Center

Introducing the FEY-Approach in Test Automation

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10 min read/Jul 19, 2023

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Introducing the FEY-Approach in Test Automation

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Key Considerations for Securing In-Vehicle Apps

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5 min read/Jul 18, 2023

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Key Considerations for Securing In-Vehicle Apps

By Chris Clark

Tags: Silicon Lifecycle Management, Chip Design Insights, Design, Automotive

How STMicroelectronics and Microsoft are Using AI-Driven Technology to Optimize PPA

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3 min read/Jul 11, 2023

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How STMicroelectronics and Microsoft are Using AI-Driven Technology to Optimize PPA

By Rob van Blommestein

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design

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5 min read/Jul 11, 2023

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New Synopsys Cloud 4.0 Delivers E-Commerce and ZeBu Cloud SaaS Flows for Greater Flexibility and Scalability

By Vikram Bhatia

Tags: Cloud, Product Spotlight, Chip Design Insights, Design

The Lights Controller: Standard Example for Test Automation with TPT

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3 min read/Jun 28, 2023

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The Lights Controller: Standard Example for Test Automation with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Designing Electrostatic Discharge (ESD) Protection for Monolithic SoCs and Multi-Die Systems

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5 min read/Jun 21, 2023

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Designing Electrostatic Discharge (ESD) Protection for Monolithic SoCs and Multi-Die Systems

By Dermott Lynch

Tags: Multi-Die System, Chip Design Insights, Design, Design Technology Co-Optimization

Synopsys and AMD Collaboration Achieves Significant Milestones for EDA Workloads

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4 min read/Jun 13, 2023

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Synopsys and AMD Collaboration Achieves Significant Milestones for EDA Workloads

By Andy Tai, Ramesh Narayanaswamy

Tags: Multi-Die System, Chip Design Insights, Design, Physical Implementation, Signoff, HPC, Data Center, Verification

Leveraging Equivalence Classes for Testing with TPT

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5 min read/Jun 13, 2023

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Leveraging Equivalence Classes for Testing with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Demanding Chip Complexity and Manufacturing Requirements Call for Data Analytics

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4 min read/Jun 02, 2023

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Demanding Chip Complexity and Manufacturing Requirements Call for Data Analytics

By Guy Cortez

Tags: Product Spotlight, Silicon Lifecycle Management, Chip Design Insights, Design

From Silicon Design to End of Life��Mitigate Memory Failures to Boost Reliability

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6 min read/May 31, 2023

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From Silicon Design to End of Life��Mitigate Memory Failures to Boost Reliability

By Anand Thiruvengadam, Guy Cortez

Tags: Memory, Chip Design Insights, Design

Synopsys 2022 ESG Report: Building a Smart Future Together

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3 min read/May 30, 2023

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Synopsys 2022 ESG Report: Building a Smart Future Together

By Erika Varga McEnroe

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, Inside Synopsys

What are Testlets? - Simplifying Software Testing with Testlets

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2 min read/May 24, 2023

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What are Testlets? - Simplifying Software Testing with Testlets

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

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5 min read/May 19, 2023

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Why Designers are Using EDA Tools in the Cloud

By Vikram Bhatia

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Verification

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6 min read/May 09, 2023

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What Does the Future Hold for AI in Chip Design?

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design, Verification

Synopsys Acquires Silicon Frontline Technology

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3 min read/May 04, 2023

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Synopsys Acquires Silicon Frontline Technology

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, Signoff, Inside Synopsys

Understanding Assesslets: Innovative Test Documentation in Automotive Industry

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4 min read/May 02, 2023

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Understanding Assesslets: Innovative Test Documentation in Automotive Industry

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

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4 min read/May 01, 2023

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How AI Revolutionized EDA Tools and Silicon Chip Design

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design, Verification, Inside Synopsys

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7 min read/Apr 25, 2023

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Upgrading 3DIC Packaging for Faster AI Inference with PSMC

By Kenneth Larsen

Tags: Multi-Die System, Chip Design Insights, Design

Testing Simulink Models on Linux with TPT

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1 min read/Apr 23, 2023

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Testing Simulink Models on Linux with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Get Certified in Semiconductor Engineering

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2 min read/Apr 20, 2023

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Get Certified in Semiconductor Engineering

By Anupama Shojaei

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

How AI Enhances EDA Tools and Chip Design

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5 min read/Apr 19, 2023

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How AI Enhances EDA Tools and Chip Design

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design

SNUG Silicon Valley 2023: Catalyzing the Future for Our Smart Everything World

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5 min read/Apr 13, 2023

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SNUG Silicon Valley 2023: Catalyzing the Future for Our Smart Everything World

By Rob van Blommestein

Tags: Multi-Die System, AI & Machine Learning, Silicon Lifecycle Management, Test, Chip Design Insights, Design, Verification, Inside Synopsys

Revolutionizing Chip Design with AI-Enabled EDA Tools

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6 min read/Mar 29, 2023

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Revolutionizing Chip Design with AI-Enabled EDA Tools

By Arvind Narayanan

Tags: AI & Machine Learning, Test, Chip Design Insights, Design, Verification

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4 min read/Mar 23, 2023

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Why AI Requires a New Chip Architecture

By Thomas Andersen

Tags: AI & Machine Learning, Chip Design Insights, Design

SoC Design Verification and Chip Debug with AI

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6 min read/Mar 22, 2023

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SoC Design Verification and Chip Debug with AI

By Taruna Reddy, Robert Ruiz

Tags: AI & Machine Learning, Chip Design Insights, Design, Verification

Discover the Latest in AI, EDA, and Multi-Die Systems

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2 min read/Mar 17, 2023

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Discover the Latest in AI, EDA, and Multi-Die Systems

By Rob van Blommestein

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Silicon IP, Verification, Inside Synopsys

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3 min read/Mar 16, 2023

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How AI Will Change Chip Design

By Arvind Narayanan

Tags: AI & Machine Learning, Chip Design Insights, Design

Optimizing the RTL Design Flow with Real-Time PPA Analysis

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5 min read/Mar 09, 2023

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Optimizing the RTL Design Flow with Real-Time PPA Analysis

By Jim Schultz

Tags: RTL Synthesis, Product Spotlight, Debug, Chip Design Insights, Design, Verification

Resolving PPA Issues with RTL Architect & Verdi Integration

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2 min read/Mar 09, 2023

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Resolving PPA Issues with RTL Architect & Verdi Integration

By Synopsys Editorial Staff

Tags: RTL Synthesis, Design

Fostering STEM Education Through Roadtrip Nation & PBS

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4 min read/Feb 23, 2023

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Fostering STEM Education Through Roadtrip Nation & PBS

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Manufacturing, Inside Synopsys

Reduced Maintenance & Improved Quality in Software Testing

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2 min read/Feb 22, 2023

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Reduced Maintenance & Improved Quality in Software Testing

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Top 2023 AI Predictions: AI Apps & Chip Design Tools

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5 min read/Feb 09, 2023

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Top 2023 AI Predictions: AI Apps & Chip Design Tools

By Stelios Diamantidis

Tags: AI & Machine Learning, Chip Design Insights, Design

Boosting Chip Design & Verification with AI EDA Tools

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5 min read/Feb 07, 2023

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Boosting Chip Design & Verification with AI EDA Tools

By Shankar Krishnamoorthy

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, Verification

Synopsys Custom Design Family Customer Testimonials

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6 min read/Feb 07, 2023

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Synopsys Custom Design Family Customer Testimonials

By Synopsys Editorial Staff

Tags: Customer Spotlight, Design

Revolutionizing Optical SoC Design with Lightelligence

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1 min read/Feb 01, 2023

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Revolutionizing Optical SoC Design with Lightelligence

By Kamal Desai

Tags: Customer Spotlight, AI & Machine Learning, Chip Design Insights, Design

Redefining Test Expectations with Synopsys TestMAX Family of Products: An Interview with Amit Sanghani

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3 min read/Jan 25, 2023

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Redefining Test Expectations with Synopsys TestMAX Family of Products: An Interview with Amit Sanghani

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

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1 min read/Jan 25, 2023

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Interview with Ypsomed

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Revolutionizing Pre-silicon Design Robustness Analysis with Li Ding

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3 min read/Jan 24, 2023

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Revolutionizing Pre-silicon Design Robustness Analysis with Li Ding

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Enabling Superior RTL with Synopsys RTL Architect: A Discussion with Vineet Rashingkar

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3 min read/Jan 24, 2023

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Enabling Superior RTL with Synopsys RTL Architect: A Discussion with Vineet Rashingkar

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Solving Signal & Power Issues in High-Speed Data Centers?

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3 min read/Jan 22, 2023

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Solving Signal & Power Issues in High-Speed Data Centers?

By Pavani Jella

Tags: Chip Design Insights, Design

Parameters: A Major Challenge in Automotive Software Development

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5 min read/Jan 17, 2023

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Parameters: A Major Challenge in Automotive Software Development

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Navigating the Era of Autonomous Design for Powerful Compute with Hardware

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4 min read/Jan 11, 2023

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Navigating the Era of Autonomous Design for Powerful Compute with Hardware

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design

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6 min read/Jan 10, 2023

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5 Cloud Predictions to Watch in 2023

By Vikram Bhatia, Sandeep Mehndiratta

Tags: Cloud, Chip Design Insights, Design, HPC, Data Center, Verification

How Returnship Programs Provide New Career Opportunities?

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5 min read/Jan 09, 2023

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How Returnship Programs Provide New Career Opportunities?

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

Achieving 100% Confidence in Requirement Verification Tests

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9 min read/Jan 08, 2023

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Achieving 100% Confidence in Requirement Verification Tests

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

3 Key Technologies that Will Transform Electronic Design in 2023

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6 min read/Jan 03, 2023

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3 Key Technologies that Will Transform Electronic Design in 2023

By Sanjay Bali

Tags: Cloud, Multi-Die System, Silicon Lifecycle Management, Chip Design Insights, Design, 3DIC Design

Introduction to Automotive Testing Terms

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11 min read/Dec 20, 2022

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Introduction to Automotive Testing Terms

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

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10 min read/Dec 19, 2022

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2022's EDA & Chip Design Advancements?

By Synopsys Editorial Staff

Tags: Multi-Die System, AI & Machine Learning, Prototyping, Emulation, Interface IP, Inside Synopsys, Cloud, Chip Design Insights, Design, Automotive, HPC, Data Center, Silicon IP, Verification

Why Reliability, Availability & Serviceability Matter in HPC?

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5 min read/Dec 14, 2022

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Why Reliability, Availability & Serviceability Matter in HPC?

By Rita Horner, Pawini Mahajan, Charlie Matar

Tags: Chip Design Insights, Design, HPC, Data Center, Silicon IP

How Digital Tools Speed Up Memory Chip Design & Verification?

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4 min read/Dec 12, 2022

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How Digital Tools Speed Up Memory Chip Design & Verification?

By Farzin Rasteh, Preeti Jain, Anand Thiruvengadam, Jim Schultz

Tags: Memory, Chip Design Insights, Design, Verification

How the Electronics Industry Can Shape a Sustainable World?

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6 min read/Dec 06, 2022

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How the Electronics Industry Can Shape a Sustainable World?

By Godwin Maben, Piyush Sancheti

Tags: Silicon Lifecycle Management, Chip Design Insights, Design, Energy-Efficient SoCs, Silicon IP, Verification

5 Secret Hacks to Minimize Testing Efforts

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5 min read/Dec 06, 2022

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5 Secret Hacks to Minimize Testing Efforts

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Addressing the Chip Supply Shortage with Silicon Remastering?

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5 min read/Nov 15, 2022

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Addressing the Chip Supply Shortage with Silicon Remastering?

By Stelios Diamantidis

Tags: AI & Machine Learning, Chip Design Insights, Design

Preparing for Automotive SPICE Assessment: A Guide to Software Unit Verification

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11 min read/Nov 15, 2022

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Preparing for Automotive SPICE Assessment: A Guide to Software Unit Verification

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Streamlining Photonic Integrated Circuit Design with PDKs?

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3 min read/Nov 14, 2022

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Streamlining Photonic Integrated Circuit Design with PDKs?

By Twan Korthorst

Tags: Chip Design Insights, Design, Manufacturing, Photonic

How to Protect Advanced Chip Designs from Security Breaches?

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5 min read/Nov 09, 2022

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How to Protect Advanced Chip Designs from Security Breaches?

By Ian Land

Tags: Aerospace & Government, Silicon Lifecycle Management, Prototyping, Chip Design Insights, Simulation, Design, Emulation, Silicon IP, Verification, Formal Verification

Celebrating STEM Day with Advice from Early-Career R&D Engineers

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5 min read/Nov 07, 2022

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Celebrating STEM Day with Advice from Early-Career R&D Engineers

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

The Importance of Unit Definition in the Testing Process with TPT

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2 min read/Nov 03, 2022

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The Importance of Unit Definition in the Testing Process with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Library Characterization for Advanced Process Chip Designs?

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4 min read/Nov 02, 2022

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Library Characterization for Advanced Process Chip Designs?

By Moninder Bansal

Tags: Product Spotlight, Chip Design Insights, Design, Signoff

Cloud-Based EDA Tools for Aerospace Chip Designers?

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3 min read/Oct 31, 2022

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Cloud-Based EDA Tools for Aerospace Chip Designers?

By Ian Land

Tags: Cloud, Aerospace & Government, Chip Design Insights, Design

Why Sacrifice QoRs? Optimizing Design Signoff and Achieving Accurate Functional ECOs the Smarter Way

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7 min read/Oct 27, 2022

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Why Sacrifice QoRs? Optimizing Design Signoff and Achieving Accurate Functional ECOs the Smarter Way

By Makarand Patil, Avinash Palepu

Tags: Product Spotlight, Chip Design Insights, Design, Signoff

How Digital Twins are Transforming Aerospace and Defense?

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6 min read/Oct 18, 2022

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How Digital Twins are Transforming Aerospace and Defense?

By Jason Niatas, Marc Serughetti, Ian Land

Tags: Aerospace & Government, Chip Design Insights, Design, Verification

How to Shift Memory Design Left with Machine Learning?

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6 min read/Oct 17, 2022

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How to Shift Memory Design Left with Machine Learning?

By Anand Thiruvengadam

Tags: AI & Machine Learning, Memory, Chip Design Insights, Design

Regression vs. Back-to-Back Testing: Which One to Choose in TPT?

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1 min read/Oct 13, 2022

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Regression vs. Back-to-Back Testing: Which One to Choose in TPT?

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

The Next Era of Chip Design Starts with Machine Learning?

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5 min read/Oct 10, 2022

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The Next Era of Chip Design Starts with Machine Learning?

By Synopsys Editorial Staff

Tags: Cloud, AI & Machine Learning, Silicon Lifecycle Management, Chip Design Insights, Design, Energy-Efficient SoCs

Unifying Timing Constraints with FishTail Design Automation?

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4 min read/Sep 27, 2022

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Unifying Timing Constraints with FishTail Design Automation?

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Signoff, Verification

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1 min read/Sep 26, 2022

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Automating Test Automation with TPT API

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

SNUG Israel 2022 Spotlights Talks on Silicon Design, Verification, and IP ��ý for AI, Cloud and Automotive

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1 min read/Sep 20, 2022

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SNUG Israel 2022 Spotlights Talks on Silicon Design, Verification, and IP ��ý for AI, Cloud and Automotive

By Isaac Zafrany

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Automotive, Silicon IP, Verification, Inside Synopsys

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3 min read/Sep 20, 2022

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Setting Up Scenarios for SOTIF in TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Enabling Edge Machine Learning Applications with SiMA.ai?

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4 min read/Sep 14, 2022

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Enabling Edge Machine Learning Applications with SiMA.ai?

By Stelios Diamantidis

Tags: Customer Spotlight, RTL Synthesis, AI & Machine Learning, Chip Design Insights, Design, Emulation, Signoff, Silicon IP, Verification

AI-Driven Debug Automation Speeds Up Root-Cause Analysis?

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2 min read/Sep 11, 2022

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AI-Driven Debug Automation Speeds Up Root-Cause Analysis?

By Rob van Blommestein

Tags: AI & Machine Learning, Debug, Chip Design Insights, Design, Verification

How to Accelerate the SoC Design Flow with AI-Enabled Kits?

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3 min read/Aug 30, 2022

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How to Accelerate the SoC Design Flow with AI-Enabled Kits?

By Paul Holt, Frank Gover, Gary Rudolph

Tags: AI & Machine Learning, Chip Design Insights, Design, 5G Wireless, Automotive, Silicon IP

Why DTCO is Critical to Modern Memory Design Techniques?

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5 min read/Aug 24, 2022

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Why DTCO is Critical to Modern Memory Design Techniques?

By Anand Thiruvengadam, Ricardo Borges

Tags: Custom Implementation, Chip Design Insights, Design, Design Technology Co-Optimization

Reflecting on the 59th Design Automation Conference (DAC)

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6 min read/Aug 11, 2022

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Reflecting on the 59th Design Automation Conference (DAC)

By Synopsys Editorial Staff

Tags: Cloud, Chip Design Insights, Design, Inside Synopsys

Accelerate SoC Design Flow with Functional ECO?

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6 min read/Aug 09, 2022

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Accelerate SoC Design Flow with Functional ECO?

By Makarand Patil, Avinash Palepu

Tags: Product Spotlight, Chip Design Insights, Design, Signoff

Top Medical Device Design Priorities & Chip Design Process?

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6 min read/Aug 08, 2022

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Top Medical Device Design Priorities & Chip Design Process?

By Godwin Maben, Piyush Sancheti, Hany Elhak

Tags: Medical, Chip Design Insights, Design

Returning to Work After A Career Break: RIYA Returnship?

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4 min read/Jul 25, 2022

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Returning to Work After A Career Break: RIYA Returnship?

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

Understanding Silicon Lifecycle Management (SLM)

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6 min read/Jul 19, 2022

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Understanding Silicon Lifecycle Management (SLM)

By Steve Pateras

Tags: Product Spotlight, Silicon Lifecycle Management, Chip Design Insights, Design, Manufacturing

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5 min read/Jul 11, 2022

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What is a SmartNIC?

By Rita Horner

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, Security IP, Foundation IP, HPC, Data Center, Silicon IP, Verification, 3DIC Design

Logic Synthesis & Chip Design: Q&A with Luca Amaru, R&D Engineer?

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5 min read/Jul 05, 2022

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Logic Synthesis & Chip Design: Q&A with Luca Amaru, R&D Engineer?

By Synopsys Editorial Staff

Tags: RTL Synthesis, Chip Design Insights, Design, Inside Synopsys

DAC 2022: A Glimpse into the World of Design Automation from the Cloud to Cryogenic Computing

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4 min read/Jul 05, 2022

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DAC 2022: A Glimpse into the World of Design Automation from the Cloud to Cryogenic Computing

By Rob van Bloomestein

Tags: Cloud, Chip Design Insights, Design, Silicon IP, Verification, Inside Synopsys

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1 min read/Jul 03, 2022

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5 Reasons for Testing Simulink with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Improving Semiconductor Yield with Test Data Analytics?

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11 min read/Jun 27, 2022

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Improving Semiconductor Yield with Test Data Analytics?

By Randy Fish, Guy Cortez

Tags: Customer Spotlight, Silicon Lifecycle Management, Chip Design Insights, Design

Adding Semiconductor Engineering Degree Programs at Purdue?

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5 min read/Jun 15, 2022

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Adding Semiconductor Engineering Degree Programs at Purdue?

By Patrick Haspel

Tags: Chip Design Insights, Design, Verification, Inside Synopsys

Fostering Engineering Education: Analog IC Design Contest?

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3 min read/Jun 13, 2022

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Fostering Engineering Education: Analog IC Design Contest?

By Srinivas Macha

Tags: Custom Implementation, Chip Design Insights, Design, Inside Synopsys

Synopsys Internship Program FAQs: Student Tech Internships?

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4 min read/Jun 09, 2022

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Synopsys Internship Program FAQs: Student Tech Internships?

By Anna Tabet

Tags: AI & Machine Learning, Chip Design Insights, Design, Inside Synopsys

How Chip Floorplan Design Automation Accelerates Chip Design?

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6 min read/Jun 06, 2022

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How Chip Floorplan Design Automation Accelerates Chip Design?

By Preeti Jain

Tags: Customer Spotlight, AI & Machine Learning, Chip Design Insights, Design, Manufacturing, HPC, Data Center

How to Drastically Enhance Analog Layout Efficiency Using a Highly Reusable User-Defined Device

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2 min read/Jun 01, 2022

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How to Drastically Enhance Analog Layout Efficiency Using a Highly Reusable User-Defined Device

By Synopsys Editorial Staff

Tags: Design, Analog Design

Machine Learning Uncovers Chip Design Insights?

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6 min read/May 31, 2022

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Machine Learning Uncovers Chip Design Insights?

By Mark Richards

Tags: AI & Machine Learning, Product Spotlight, Chip Design Insights, Design, Manufacturing

AI-Enabled Chip Design Tools: Synopsys AI Podcast?

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2 min read/May 30, 2022

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AI-Enabled Chip Design Tools: Synopsys AI Podcast?

By Geetha Rangarajan

Tags: AI & Machine Learning, Chip Design Insights, Design

AI Chip Design Breakthroughs at SNUG Silicon Valley 2022?

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6 min read/May 18, 2022

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AI Chip Design Breakthroughs at SNUG Silicon Valley 2022?

By Geetha Rangarajan

Tags: AI & Machine Learning, Chip Design Insights, Design, Inside Synopsys

Optical Design's Role in Space: National Space Day 2022?

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6 min read/May 05, 2022

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Optical Design's Role in Space: National Space Day 2022?

By Blake Crowther

Tags: Aerospace & Government, Chip Design Insights, Design

Hardware-in-the-Loop (HiL) Testing with TPT and ASAM XiL

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1 min read/May 03, 2022

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Hardware-in-the-Loop (HiL) Testing with TPT and ASAM XiL

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Introducing Markup in TPT18: Enhance Your Test Case Clarity

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1 min read/Apr 25, 2022

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Introducing Markup in TPT18: Enhance Your Test Case Clarity

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Speed Up Simulink in Rapid Accelerator Mode

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1 min read/Apr 19, 2022

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Speed Up Simulink in Rapid Accelerator Mode

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Catalyzing the Impossible �C When Semiconductor Design Gets Its SaaS On

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4 min read/Apr 13, 2022

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Catalyzing the Impossible �C When Semiconductor Design Gets Its SaaS On

By Synopsys Editorial Staff

Tags: Cloud, Chip Design Insights, Design, Verification, Inside Synopsys

Top-Level Interconnect Planning and Implementation using Synopsys IC Compiler II

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2 min read/Apr 03, 2022

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Top-Level Interconnect Planning and Implementation using Synopsys IC Compiler II

By Jiangtao Meng

Tags: Design, Physical Implementation

2022: The Year of Cloud-Based Chip Design & Verification?

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7 min read/Mar 22, 2022

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2022: The Year of Cloud-Based Chip Design & Verification?

By Sandeep Mehndiratta

Tags: Cloud, Chip Design Insights, Design, HPC, Data Center, Verification

Formal Requirements vs. Natural Language Requirements

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1 min read/Mar 20, 2022

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Formal Requirements vs. Natural Language Requirements

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

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3 min read/Mar 16, 2022

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SRAM Margin Analysis Workflow

By Synopsys Editorial Staff

Tags: Design

SNUG Silicon Valley 2022: Synopsys Users Group?

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2 min read/Mar 14, 2022

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SNUG Silicon Valley 2022: Synopsys Users Group?

By Synopsys Editorial Staff

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Automotive, HPC, Data Center, Silicon IP, Verification, Inside Synopsys

Why the James Webb Space Telescope Is the Next Best Thing to Time Travel

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8 min read/Mar 14, 2022

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Why the James Webb Space Telescope Is the Next Best Thing to Time Travel

By Mark Kahan

Tags: Aerospace & Government, Chip Design Insights, Design, CODE V, Optical

Enabling AI Chip Design with Specialized SoC IP ��ý?

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7 min read/Feb 22, 2022

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Enabling AI Chip Design with Specialized SoC IP ��ý?

By Ron Lowman

Tags: AI & Machine Learning, Chip Design Insights, Design, Silicon IP

MC/DC Coverage: The Struggle of Reaching 100% Coverage

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3 min read/Feb 20, 2022

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MC/DC Coverage: The Struggle of Reaching 100% Coverage

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

How to Design SoCs for the SysMoore Era?

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6 min read/Feb 16, 2022

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How to Design SoCs for the SysMoore Era?

By Dr. Ming Zhang

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, 3DIC Design

Celebrating International Day of Women & Girls in Science?

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4 min read/Feb 10, 2022

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Celebrating International Day of Women & Girls in Science?

By Synopsys Editorial Staff

Tags: Chip Design Insights, Design, Silicon IP, Inside Synopsys

Powering Circuit Simulation Software with NVIDIA GPUs?

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4 min read/Feb 08, 2022

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Powering Circuit Simulation Software with NVIDIA GPUs?

By Samad Parekh

Tags: Customer Spotlight, Chip Design Insights, Design, Signoff

AI Chip Design Enables Breakthroughs for Chip Makers?

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6 min read/Feb 01, 2022

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AI Chip Design Enables Breakthroughs for Chip Makers?

By Stelios Diamantidis

Tags: AI & Machine Learning, Chip Design Insights, Design

Advancing STEM Education & Research with EDA Tools?

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4 min read/Jan 31, 2022

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Advancing STEM Education & Research with EDA Tools?

By Synopsys Editorial Staff

Tags: TCAD, Chip Design Insights, Design, Manufacturing, Verification, Inside Synopsys

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3 min read/Jan 26, 2022

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A New World of Tech Innovation?

By Mike Gianfagna

Tags: AI & Machine Learning, Chip Design Insights, Design, Verification, Inside Synopsys

The Future of High-Performance Computing: Key Predictions for 2022

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7 min read/Jan 19, 2022

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The Future of High-Performance Computing: Key Predictions for 2022

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design, HPC, Data Center, Verification

AI Chip Design: How SoCs are Designed for AI Applications?

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2 min read/Jan 12, 2022

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AI Chip Design: How SoCs are Designed for AI Applications?

By Synopsys Editorial Staff

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, Verification

AI Predictions 2022: Applications & Trends in AI Chip Design?

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5 min read/Jan 05, 2022

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AI Predictions 2022: Applications & Trends in AI Chip Design?

By Stelios Diamantidis

Tags: AI & Machine Learning, Chip Design Insights, Design

What is Processor-in-the-Loop (PiL) Testing?

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1 min read/Jan 04, 2022

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What is Processor-in-the-Loop (PiL) Testing?

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

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4 min read/Dec 19, 2021

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Where Does Innovation Come From??

By Mike Gianfagna

Tags: Chip Design Insights, Design, Manufacturing, Silicon IP, Verification, Inside Synopsys

Hyper-Convergent Chip Designs: News & Trends?

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2 min read/Dec 15, 2021

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Hyper-Convergent Chip Designs: News & Trends?

By Synopsys Editorial Staff

Tags: Multi-Die System, Chip Design Insights, Design, HPC, Data Center

Happy 40th, HSPICE! Looking Forward to the Next 40 Years of Circuit Simulation Innovation

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4 min read/Dec 13, 2021

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Happy 40th, HSPICE! Looking Forward to the Next 40 Years of Circuit Simulation Innovation

By Anand Thiruvengadam, Tao Huang

Tags: Product Spotlight, Chip Design Insights, Design

Maximizing Silicon Design & Chip Performance with Concertio?

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5 min read/Dec 08, 2021

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Maximizing Silicon Design & Chip Performance with Concertio?

By Synopsys Editorial Staff

Tags: Product Spotlight, Silicon Lifecycle Management, Chip Design Insights, Design, Manufacturing

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5 min read/Dec 07, 2021

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Memory Chip Design: Tools & Challenges?

By Anand Thiruvengadam

Tags: AI & Machine Learning, Memory, Chip Design Insights, Design, Manufacturing, Internet of Things

What is Photonics? - Fundamentals & Applications?

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6 min read/Dec 06, 2021

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What is Photonics? - Fundamentals & Applications?

By Twan Korthorst

Tags: Data Center, AI & Machine Learning, Chip Design Insights, Design, Photonic, Consumer, Optical

What is Software-in-the-Loop (SiL) Testing?

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2 min read/Dec 01, 2021

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What is Software-in-the-Loop (SiL) Testing?

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

What is Democratized Design? - Chip Design Process

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4 min read/Nov 29, 2021

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What is Democratized Design? - Chip Design Process

By Synopsys Editorial Staff

Tags: Multi-Die System, Chip Design Insights, Design

How Silicon Lifecycle Management Enables Smarter Chip Design

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4 min read/Nov 17, 2021

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How Silicon Lifecycle Management Enables Smarter Chip Design

By Steve Pateras

Tags: Silicon Lifecycle Management, Chip Design Insights, Design

What is Quantum Computing? - Applications & Challenges?

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8 min read/Nov 08, 2021

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What is Quantum Computing? - Applications & Challenges?

By Kenneth Larsen

Tags: AI & Machine Learning, Chip Design Insights, Design, Photonic, Optical, 3DIC Design

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6 min read/Nov 01, 2021

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What are Counterfeit Chips?

By Mike Borza

Tags: Chip Design Insights, Design

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3 min read/Oct 19, 2021

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Digital Design Technology Symposium 2021?

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Chip Design Insights, Design

2021 ERI Summit & Microsystems Technology Office Symposium?

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3 min read/Oct 11, 2021

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2021 ERI Summit & Microsystems Technology Office Symposium?

By Ian Land

Tags: Aerospace & Government, Silicon Lifecycle Management, Chip Design Insights, Design, Design Technology Co-Optimization, Silicon IP, 3DIC Compiler

Unified Power Format Expands Low-Power IC Design?

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8 min read/Oct 04, 2021

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Unified Power Format Expands Low-Power IC Design?

By Nikhil Amin, Harsha Vardhan

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, Verification

Hyper-Convergent Chip Design Tools Power SoC Innovation?

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5 min read/Sep 29, 2021

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Hyper-Convergent Chip Design Tools Power SoC Innovation?

By Shekhar Kapoor, Mark Richards

Tags: Chip Design Insights, Design, 3DIC Design

AI Chip Design Tools Deliver Autonomous Insights?

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4 min read/Sep 28, 2021

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AI Chip Design Tools Deliver Autonomous Insights?

By Mike Gianfagna

Tags: AI & Machine Learning, Chip Design Insights, Design

Enabling IC Design Reliability Analysis: PrimeSim Continuum?

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3 min read/Sep 26, 2021

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Enabling IC Design Reliability Analysis: PrimeSim Continuum?

By Synopsys Editorial Staff

Tags: Product Spotlight, Chip Design Insights, Design

Improving Robustness and Minimizing Over-Pessimism in the Face of Rising Design Variability

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4 min read/Sep 23, 2021

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Improving Robustness and Minimizing Over-Pessimism in the Face of Rising Design Variability

By Rahul Deokar

Tags: Design

High-Performance Computing Drives Demand for Chiplets

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5 min read/Sep 14, 2021

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High-Performance Computing Drives Demand for Chiplets

By Kenneth Larsen

Tags: Multi-Die System, Chip Design Insights, Design, Interface IP, HPC, Data Center, Silicon IP

EDA Tools Help Students Build IC Design Skills?

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4 min read/Sep 08, 2021

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EDA Tools Help Students Build IC Design Skills?

By Synopsys Editorial Staff

Tags: Custom Implementation, Physical Verification, Chip Design Insights, Design, Signoff, Inside Synopsys

Achieving Functional Safety and High-Reliability Design with Synplify Tool

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1 min read/Sep 07, 2021

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Achieving Functional Safety and High-Reliability Design with Synplify Tool

By Synopsys Editorial Staff

Tags: Design, FPGA Design

PrimeShield Design Robustness Analysis and ECO Overview

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3 min read/Aug 23, 2021

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PrimeShield Design Robustness Analysis and ECO Overview

By Sahil Bargal

Tags: Design

Improving Design Robustness with PrimeShield: A Discussion with Li Ding

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2 min read/Aug 19, 2021

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Improving Design Robustness with PrimeShield: A Discussion with Li Ding

By Synopsys Editorial Staff

Tags: Design, Signoff, Inside Synopsys

Will AI Chip Design Tools Take Your Job??

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4 min read/Aug 18, 2021

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Will AI Chip Design Tools Take Your Job??

By Mike Gianfagna

Tags: AI & Machine Learning, Chip Design Insights, Design

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5 min read/Aug 09, 2021

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What is a Multi-Die Chip Design?

By Kenneth Larsen, Manuel Mota

Tags: Multi-Die System, Chip Design Insights, Design, Interface IP, Silicon IP

Technical Features of StarRC Merge Corners

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2 min read/Aug 04, 2021

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Technical Features of StarRC Merge Corners

By Synopsys Editorial Staff

Tags: Design

Improved Power System Optimization for SoC Designs?

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6 min read/Jul 28, 2021

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Improved Power System Optimization for SoC Designs?

By Jay Roy

Tags: Chip Design Insights, Design, Energy-Efficient SoCs, Verification

Aaroh Labs Advanced-Node Semiconductor Designs?

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3 min read/Jul 26, 2021

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Aaroh Labs Advanced-Node Semiconductor Designs?

By Rob van Bloomestein

Tags: Customer Spotlight, Chip Design Insights, Design, Internet of Things, HPC, Data Center, Verification

Powering the AI Chip Design Process with AI?

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5 min read/Jul 14, 2021

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Powering the AI Chip Design Process with AI?

By Mike Gianfagna

Tags: AI & Machine Learning, Chip Design Insights, Design

3DIC Design Optimization for Power, Performance & Area?

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6 min read/Jul 13, 2021

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3DIC Design Optimization for Power, Performance & Area?

By Kenneth Larsen

Tags: Multi-Die System, Chip Design Insights, Design

Innovations in Formality Equivalence Checking: An Interview with Todd Buzan

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3 min read/Jul 09, 2021

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Innovations in Formality Equivalence Checking: An Interview with Todd Buzan

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Achieving the Best Arm PPA: A Discussion with Sudhakar Jilla

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4 min read/Jul 09, 2021

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Achieving the Best Arm PPA: A Discussion with Sudhakar Jilla

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Designing AI Chips: A Conversation with Thomas Andersen

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4 min read/Jul 09, 2021

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Designing AI Chips: A Conversation with Thomas Andersen

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Design, Inside Synopsys

Interview with Weikai Sun: Enhancing Custom Design Productivity with Synopsys Custom Design Platform

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5 min read/Jul 08, 2021

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Interview with Weikai Sun: Enhancing Custom Design Productivity with Synopsys Custom Design Platform

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Insight into the Arm-Synopsys Collaboration: Interview with Deirdre Hanford

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3 min read/Jul 08, 2021

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Insight into the Arm-Synopsys Collaboration: Interview with Deirdre Hanford

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Understanding the Role of AI in Chip Design: A Discussion with Synopsys' ML CoE

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5 min read/Jul 08, 2021

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Understanding the Role of AI in Chip Design: A Discussion with Synopsys' ML CoE

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Design, Inside Synopsys

Addressing Advanced Node Challenges with PrimeTime?: An Interview with Feroze Taraporevala

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5 min read/Jul 08, 2021

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Addressing Advanced Node Challenges with PrimeTime?: An Interview with Feroze Taraporevala

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

ESP Equivalence Checking in Custom Design: An Interview with Almitra Pradhan

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3 min read/Jul 08, 2021

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ESP Equivalence Checking in Custom Design: An Interview with Almitra Pradhan

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Extraction for Custom Design & Advanced Nodes: A Conversation with Mo Movahed-Ezazi

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4 min read/Jul 08, 2021

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Extraction for Custom Design & Advanced Nodes: A Conversation with Mo Movahed-Ezazi

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Minimizing Late-stage Functional ECOs: A Discussion with Todd Buzan

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3 min read/Jul 08, 2021

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Minimizing Late-stage Functional ECOs: A Discussion with Todd Buzan

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

How PrimeSim Continuum is Transforming SoC Design: Insights from Hany Elhak

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5 min read/Jul 07, 2021

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How PrimeSim Continuum is Transforming SoC Design: Insights from Hany Elhak

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

How Emulation Helps Find Power Bugs During SoC Verification?

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5 min read/Jul 06, 2021

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How Emulation Helps Find Power Bugs During SoC Verification?

By Alex Wakefield

Tags: Static Verification, Chip Design Insights, Simulation, Design, Emulation, Energy-Efficient SoCs, Signoff, Verification, Virtual Prototyping, Formal Verification

StarRC?: Enhancing Custom SoC Design with Advanced Features

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3 min read/Jul 06, 2021

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StarRC?: Enhancing Custom SoC Design with Advanced Features

By Synopsys Editorial Staff

Tags: Design

Semiconductors & Chip Design Drive Global Innovation?

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5 min read/Jun 29, 2021

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Semiconductors & Chip Design Drive Global Innovation?

By Mike Gianfagna

Tags: Chip Design Insights, Design, Manufacturing, Verification

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3 min read/Jun 28, 2021

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Resistance Extraction with StarRC

By Senthil Annamalai

Tags: Design, Signoff

Enhancing Chip Design with Artificial Intelligence?

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5 min read/Jun 15, 2021

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Enhancing Chip Design with Artificial Intelligence?

By Stelios Diamantidis

Tags: AI & Machine Learning, Chip Design Insights, Design

The Importance of Chip Design Data & Analytics?

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7 min read/Jun 09, 2021

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The Importance of Chip Design Data & Analytics?

By Guy Cortez

Tags: Smart Manufacturing, Silicon Lifecycle Management, Chip Design Insights, Design, Manufacturing

Faster Chiplet & SoC Design: Collaboration with Arm?

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4 min read/May 25, 2021

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Faster Chiplet & SoC Design: Collaboration with Arm?

By Michael Posner, Neel Desai

Tags: Cloud, AI & Machine Learning, Chip Design Insights, Design, 5G Wireless, Interface IP, HPC, Data Center, Silicon IP, Verification

Hyper-Convergent Chip Designs: All or Nothing Approach?

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5 min read/May 18, 2021

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Hyper-Convergent Chip Designs: All or Nothing Approach?

By Mike Gianfagna

Tags: Chip Design Insights, Design, HPC, Data Center

Low Power Q&A with Dr. Renu Mehra, R&D Group Director

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9 min read/May 12, 2021

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Low Power Q&A with Dr. Renu Mehra, R&D Group Director

By Synopsys Editorial Team

Tags: Chip Design Insights, Design, Energy-Efficient SoCs

Fault Injection Testing Methods with TPT

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1 min read/May 09, 2021

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Fault Injection Testing Methods with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Fusion Compiler's Golden-Signoff Backbone: An Interview with Neeraj Kaul

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5 min read/May 09, 2021

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Fusion Compiler's Golden-Signoff Backbone: An Interview with Neeraj Kaul

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

On-the-Fly Code Review Maximizes Chip Design Process

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5 min read/May 05, 2021

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On-the-Fly Code Review Maximizes Chip Design Process

By Kiran Vittal

Tags: Chip Design Insights, Design, Verification

Verifying Hyper-Convergent Systems with PrimeSim Continuum

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1 min read/May 05, 2021

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Verifying Hyper-Convergent Systems with PrimeSim Continuum

By Synopsys Editorial Staff

Tags: Design, AMS Simulation

How 5G Infrastructure Accelerates Smart City Projects

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5 min read/May 04, 2021

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How 5G Infrastructure Accelerates Smart City Projects

By Ron Lowman

Tags: Chip Design Insights, Design, 5G Wireless, Internet of Things, Silicon IP, Verification

PrimeLib? Next-Generation Library Characterization: A Discussion with Moninder Bansal

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4 min read/Apr 29, 2021

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PrimeLib? Next-Generation Library Characterization: A Discussion with Moninder Bansal

By Synopsys Editorial Staff

Tags: Design, Signoff, Inside Synopsys

Safeguarding Automotive Sensors for Automotive Safety

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5 min read/Apr 28, 2021

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Safeguarding Automotive Sensors for Automotive Safety

By Samantha Beaumont

Tags: Prototyping, Chip Design Insights, Design, Automotive, Silicon IP, Verification

Advancing IC Design with PrimeSim Continuum

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2 min read/Apr 22, 2021

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Advancing IC Design with PrimeSim Continuum

By Synopsys Editorial Staff

Tags: Design

Library Characterization Tool for Advanced Node SoC Design?

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3 min read/Apr 20, 2021

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Library Characterization Tool for Advanced Node SoC Design?

By Umang Doshi

Tags: Multi-Die System, Product Spotlight, Chip Design Insights, Design, Signoff

PrimeSim Continuum's Enables IC Hyperconvergence?

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5 min read/Apr 19, 2021

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PrimeSim Continuum's Enables IC Hyperconvergence?

By Tom Hsieh

Tags: Multi-Die System, AI & Machine Learning, Product Spotlight, Chip Design Insights, Design

FPGA Prototyping Powers the SoC Design & Verification Process

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4 min read/Apr 14, 2021

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FPGA Prototyping Powers the SoC Design & Verification Process

By Dr. Johannes Stahl

Tags: Multi-Die System, AI & Machine Learning, Product Spotlight, Prototyping, Chip Design Insights, Design, 5G Wireless, Verification

Advancing AI Chip Design with IBM's Hybrid Cloud Architecture

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4 min read/Apr 13, 2021

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Advancing AI Chip Design with IBM's Hybrid Cloud Architecture

By Arun Venkatachar

Tags: AI & Machine Learning, Chip Design Insights, Design, Verification

Updated NHTSA Automotive Cybersecurity Best Practices

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5 min read/Apr 12, 2021

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Updated NHTSA Automotive Cybersecurity Best Practices

By Jacob Wilson

Tags: Chip Design Insights, Design, Automotive

Beyond Functional Testing: The TASMO Approach

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2 min read/Apr 11, 2021

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Beyond Functional Testing: The TASMO Approach

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Integrated Chip Design Tools for IC Hyperconvergence

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4 min read/Apr 06, 2021

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Integrated Chip Design Tools for IC Hyperconvergence

By Raja Tabet, Anand Thiruvengadam

Tags: Multi-Die System, AI & Machine Learning, Chip Design Insights, Design, HPC, Data Center, Silicon IP

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1 min read/Mar 28, 2021

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Testing ASCET-DEVELOPER Models with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

ANSYS-Synopsys Collaboration: Q&A with John Lee and Jacob Avidan

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4 min read/Mar 25, 2021

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ANSYS-Synopsys Collaboration: Q&A with John Lee and Jacob Avidan

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Life Beyond 3nm: A Discussion with Jacob Avidan and Shankar Krishnamoorthy

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5 min read/Mar 25, 2021

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Life Beyond 3nm: A Discussion with Jacob Avidan and Shankar Krishnamoorthy

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

RF Designs Acceleration Using Keysight PathWave ADS

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1 min read/Mar 25, 2021

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RF Designs Acceleration Using Keysight PathWave ADS

By Damian Roberts

Tags: Design

Spotlight on Custom Compiler: An Exclusive 1:1 with Aveek Sarkar, VP of Engineering at Synopsys

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4 min read/Mar 24, 2021

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Spotlight on Custom Compiler: An Exclusive 1:1 with Aveek Sarkar, VP of Engineering at Synopsys

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Automotive Innovation Trends and Challenges: An Interview with Dr. Burkhard Huhnke

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3 min read/Mar 24, 2021

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Automotive Innovation Trends and Challenges: An Interview with Dr. Burkhard Huhnke

By Synopsys Editorial Staff

Tags: Design, Automotive, Inside Synopsys

IC Validator for Advanced-node Signoff: Interview with Christen Decoin

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3 min read/Mar 24, 2021

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IC Validator for Advanced-node Signoff: Interview with Christen Decoin

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Insights on Custom Routing: An Interview with Avina Verma

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4 min read/Mar 24, 2021

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Insights on Custom Routing: An Interview with Avina Verma

By Synopsys Editorial Staff

Tags: Design, Inside Synopsys

Emulation Technology for Faster SoC Power Verification?

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4 min read/Mar 16, 2021

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Emulation Technology for Faster SoC Power Verification?

By Dr. Johannes Stahl

Tags: AI & Machine Learning, Chip Design Insights, Design, Emulation, 5G Wireless, Energy-Efficient SoCs, Signoff, Verification

ESP Bridging the Gap Video Series: Formal Verification for Custom Digital Design

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1 min read/Mar 15, 2021

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ESP Bridging the Gap Video Series: Formal Verification for Custom Digital Design

By Synopsys Editorial Staff

Tags: Design

Optimizing Signal Distribution in FPGAs: A Guide to Automation with HAPS ProtoCompiler

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7 min read/Mar 14, 2021

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Optimizing Signal Distribution in FPGAs: A Guide to Automation with HAPS ProtoCompiler

By Christoph Kuznik, Rutger Carlsson

Tags: Prototyping, Design

Future of Automotive Sensor Fusion & Data Handling?

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5 min read/Mar 04, 2021

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Future of Automotive Sensor Fusion & Data Handling?

By Chris Clark

Tags: Chip Design Insights, Design, Automotive, Verification

How 3DIC Design Tools Enhance Productivity & Performance?

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5 min read/Mar 03, 2021

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How 3DIC Design Tools Enhance Productivity & Performance?

By Shekhar Kapoor, Kenneth Larsen

Tags: Multi-Die System, Chip Design Insights, Design, 3DIC Compiler

StarRC Standalone Netlist Reducer: Achieving Practical Simulation Times

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2 min read/Feb 18, 2021

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StarRC Standalone Netlist Reducer: Achieving Practical Simulation Times

By Senthil Annamalai

Tags: Design, Signoff

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1 min read/Feb 07, 2021

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Boundary Value Testing Methods in TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Testing AUTOSAR Software Components with TPT

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1 min read/Jan 31, 2021

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Testing AUTOSAR Software Components with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Effective Requirements-Based Testing Strategies with TPT

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2 min read/Jan 24, 2021

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Effective Requirements-Based Testing Strategies with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Meeting Auto Safety Standards with EDA Tools & IP ��ý?

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4 min read/Jan 19, 2021

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Meeting Auto Safety Standards with EDA Tools & IP ��ý?

By Meirav Nitzen, Swami Venkat

Tags: Chip Design Insights, Design, Automotive, Silicon IP, Verification

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4 min read/Jan 13, 2021

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5 Key Smart Technology Innovations?

By Synopsys Editorial Staff

Tags: AI & Machine Learning, Emulation, 5G Wireless, Internet of Things, Interface IP, Virtual Prototyping, Cloud, Chip Design Insights, Design, Security IP, Automotive, Silicon IP, Verification

Chip Design: AI & IoT's Impact on Power Consumption?

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4 min read/Jan 12, 2021

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Chip Design: AI & IoT's Impact on Power Consumption?

By Godwin Maben

Tags: AI & Machine Learning, Chip Design Insights, Design, Energy-Efficient SoCs

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4 min read/Jan 06, 2021

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AI Hardware Accelerates Innovation?

By Stelios Diamantidis

Tags: AI & Machine Learning, Chip Design Insights, Design, Silicon IP

Predictions for the Automotive Industry 2021?

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5 min read/Jan 05, 2021

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Predictions for the Automotive Industry 2021?

By Dennis Kengo Oka, Chris Clark

Tags: AI & Machine Learning, Chip Design Insights, Design, Automotive

High-Performance Computing & Cloud Predictions for 2021?

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7 min read/Dec 15, 2020

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High-Performance Computing & Cloud Predictions for 2021?

By Synopsys Editorial Staff

Tags: Cloud, Chip Design Insights, Design, HPC, Data Center

ADAS Testing with TPT: Scenario-Based Strategies and Validation

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1 min read/Dec 12, 2020

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ADAS Testing with TPT: Scenario-Based Strategies and Validation

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Back-to-Back MiL-SiL-PiL Testing with TPT: Aligning Development Phases

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1 min read/Nov 23, 2020

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Back-to-Back MiL-SiL-PiL Testing with TPT: Aligning Development Phases

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Analog Fault Simulation with Synopsys Custom Design Platform

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2 min read/Nov 12, 2020

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Analog Fault Simulation with Synopsys Custom Design Platform

By Kai Wang

Tags: Design

ESP Technology: High Coverage Symbolic Verification

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2 min read/Nov 09, 2020

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ESP Technology: High Coverage Symbolic Verification

By Synopsys Editorial Staff

Tags: Design

Harnessing Machine Learning to Boost ECO Optimization and Overcome PPA Challenges

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3 min read/Oct 27, 2020

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Harnessing Machine Learning to Boost ECO Optimization and Overcome PPA Challenges

By Shekhar Kapoor

Tags: AI & Machine Learning, Design

Model-in-Loop Testing with TPT: Efficient Simulink Model Testing

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1 min read/Oct 21, 2020

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Model-in-Loop Testing with TPT: Efficient Simulink Model Testing

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Defining the AI Era with the IBM Research AI Hardware Center?

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4 min read/Oct 20, 2020

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Defining the AI Era with the IBM Research AI Hardware Center?

By Arun Venkatachar

Tags: Multi-Die System, AI & Machine Learning, Emulation, Interface IP, Virtual Prototyping, Chip Design Insights, Design, Manufacturing, Design Technology Co-Optimization, Processor ��ý, Silicon IP, Verification, 3DIC Design

The Evolution of Synthesis: Navigating Complex Process and Layout Rules in the FinFET Era

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2 min read/Oct 18, 2020

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The Evolution of Synthesis: Navigating Complex Process and Layout Rules in the FinFET Era

By Synopsys Editorial Staff

Tags: Design

A New Approach to SoC Design with Silicon Lifecycle Management?

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4 min read/Oct 11, 2020

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A New Approach to SoC Design with Silicon Lifecycle Management?

By Steve Pateras

Tags: Product Spotlight, Silicon Lifecycle Management, Chip Design Insights, Design

How Does EDA Form the Basis for Designing Secure Systems?

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5 min read/Oct 08, 2020

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How Does EDA Form the Basis for Designing Secure Systems?

By Brandon Wang, Adam Cron

Tags: Design

Is 'Good Enough For Government Work' Still Sufficient? Not Anymore

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3 min read/Oct 08, 2020

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Is 'Good Enough For Government Work' Still Sufficient? Not Anymore

By Ruben Molina

Tags: Design

Revolutionizing ASIC Flows: The Power and Beauty of Early Stage In-Design Rail Analysis

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3 min read/Oct 07, 2020

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Revolutionizing ASIC Flows: The Power and Beauty of Early Stage In-Design Rail Analysis

By Synopsys Editorial Staff

Tags: Design

Impact of Low Power Design on Smart Edge IoT & Machine Learning?

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4 min read/Sep 23, 2020

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Impact of Low Power Design on Smart Edge IoT & Machine Learning?

By Pieter van der Wolf

Tags: AI & Machine Learning, Chip Design Insights, Design, Internet of Things, Energy-Efficient SoCs

StarRC VMF vs. IC Validator AMF Positioning: Balancing Chip Performance

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2 min read/Sep 15, 2020

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StarRC VMF vs. IC Validator AMF Positioning: Balancing Chip Performance

By Nitin Kalra

Tags: Design

PEGASUS Project: Advanced Automated Driving Tests with TPT

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1 min read/Sep 01, 2020

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PEGASUS Project: Advanced Automated Driving Tests with TPT

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

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2 min read/Aug 25, 2020

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StarRC Density Corner Value Proposition

By Nitin Kalra

Tags: Design, Signoff

Accelerating EDA with AI for Improved SoC?

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5 min read/Jul 22, 2020

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Accelerating EDA with AI for Improved SoC?

By Stelios Diamantidis

Tags: AI & Machine Learning, Chip Design Insights, Design

TPT Autotester vs. TPT Dashboard: What's the Difference?

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1 min read/Jul 22, 2020

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TPT Autotester vs. TPT Dashboard: What's the Difference?

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

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2 min read/May 25, 2020

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ADAS NCAP AEB Tests Made Easy

By Robert Fey

Tags: Design, Automotive, Test Automation, Verification

Exploring PrimeTime Technologies for Digital Design

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2 min read/Apr 29, 2020

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Exploring PrimeTime Technologies for Digital Design

By Synopsys Editorial Staff

Tags: Design

The Breakthrough Technology Behind RTL Architect

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2 min read/Apr 23, 2020

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The Breakthrough Technology Behind RTL Architect

By Synopsys Editorial Staff

Tags: Design

Getting Better Results Faster with the Singular RTL-to-GDSII Product

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7 min read/Apr 09, 2020

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Getting Better Results Faster with the Singular RTL-to-GDSII Product

By Shekhar Kapoor, Mark Richards

Tags: Design, Physical Implementation

Understanding Predictive RTL Design Closure with RTL Architect

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2 min read/Mar 16, 2020

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Understanding Predictive RTL Design Closure with RTL Architect

By Shankar Krishnamoorthy

Tags: Design

Why AI Hardware Demands the Highest Verifiable QoR

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6 min read/Mar 12, 2020

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Why AI Hardware Demands the Highest Verifiable QoR

By Bradley Geden

Tags: AI & Machine Learning, Design

Functional Safety (FuSa) Implementation Goes Mainstream

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6 min read/Dec 20, 2019

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Functional Safety (FuSa) Implementation Goes Mainstream

By Mary Ann White

Tags: Design, Automotive

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1 min read/May 07, 2019

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TestMAX: Test All the Limits

By Synopsys Editorial Staff

Tags: Design, Test Automation

Advancing Node Ready Synthesis with Design Compiler NXT

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1 min read/Nov 16, 2018

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Advancing Node Ready Synthesis with Design Compiler NXT

By Abhijeet Chakraborty

Tags: Design

Introducing Fusion Compiler & Design Compiler NXT: Synopsys' Digital Toolset Evolution

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1 min read/Nov 05, 2018

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Introducing Fusion Compiler & Design Compiler NXT: Synopsys' Digital Toolset Evolution

By Synopsys Editorial Staff

Tags: Design

Introducing Fusion Compiler: A Unified Synthesis and Place and Route Solution

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1 min read/Nov 05, 2018

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Introducing Fusion Compiler: A Unified Synthesis and Place and Route Solution

By Shankar Krishnamoorthy

Tags: Design, Physical Implementation

Transistor Architectures for 5-nm Node and Beyond

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2 min read/Sep 17, 2018

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Transistor Architectures for 5-nm Node and Beyond

By Victor Moroz

Tags: Design

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2 min read/Jun 20, 2016

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Custom Compiler In-Design Assistants (Part 2): Advanced Design Integration

By Synopsys Editorial Staff

Tags: Design

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2 min read/May 24, 2016

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Custom Compiler In-Design Assistants (Part 1): Enhancing Workflow Efficiency

By Synopsys Editorial Staff

Tags: Design

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1 min read/May 03, 2016

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Custom Compiler Layout Assistants: Streamlining Design Processes

By Synopsys Editorial Staff

Tags: Design

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